1. Field of the Invention
The invention is directed to a method for implementing standby circuiting of assemblies in 1:N redundancy.
2. Description of the Related Art
Redundancies are often used to improve reliability in communication systems. Depending on the required reliability of a communication means, different redundancy structures can be provided for the associated peripheral line assemblies. Examples of this are the “1+1” or the “1:N” line assembly redundancy described in “IEEE Journal on Selected Areas in Communications”, Vol. 15, No. 5, June 1997, pages 795 through 806. For a “1+1′ redundancy structure, two line assemblies are operated parallel in order to redundantly transmit message signal streams over them, only one of these redundant message signal streams is considered for the further-processing.
For a “1:N” line assembly redundancy, a single standby line assembly or standby circuit assembly is provided in addition to a plurality N of line assemblies. When a fault occurs on one of the N line assemblies, the standby line assembly is then used in its place.
In the Prior Art, the standby circuiting of assemblies in 1:N redundancy requires a means that maintains all information about current conditions and events within a redundancy group. This means is thus in the position to decide about required standby circuiting measures. This high-ranking means is usually the maintenance-oriented higher-ranking means of the periphery assemblies. This means must also be in the position to implement necessary alternate routings in the shortest possible time (<1 s) or, respectively, to control and monitor malfunction-free switchbacks so that the down time or, respectively, the data loss of the affected lines is minimized. The failure of a peripheral line assembly is recognized by the respectively neighboring peripheral assembly in this Prior Art.
FIG. 2 illustrates the configuration employed in the Prior Art which uses a 1:N line assembly redundancy. By way of example, only the peripheral line assemblies BG1, BG2 are shown, these being respectively allocated to one another in pairs. Both assemblies comprise connections V1 to one another via which a mutual monitoring is implemented. Further, internal and external interfaces are allocated to the peripheral line assemblies BG1 . . . BGn. The internal interfaces serve as interfaces to the assemblies AMX of the ATM switching network, whereas the external interfaces represent interfaces to the connected trunks for the other switching network devices. The assemblies BG1 . . . BGn also comprise connections V2 to the assemblies AMX of the ATM switching network, only the connection V2 of the assemblies BG1 to the assemblies AMX is shown here. All assemblies BG1 . . . BGn as well as the allocated internal and external interfaces are monitored and controlled by a higher-ranking mechanism MPSA.
Let it then be assumed below that one of the peripheral line assemblies fails, for example BG1. A corresponding message MA is consequently delivered to the higher-ranking maintenance means MPSA. This then starts a diagnosis in order to localize the fault and, potentially, verify it.
In a first step, an attempt is made to directly address the down device BG1. In the case assumed here that the affected peripheral assembly BG1 has a total failure, this failure is not recognized by the higher-ranking mechanism MPSA until after the expiration of a number of monitoring events. Only then can it be reliably assumed that assembly BG1 can no longer be addressed and, thus, is no longer available. A diagnosis of the appertaining peripheral assembly is subsequently initiated for verification of the fault. The appertaining peripheral assembly is not configured until the end of this diagnosis, the actual alternate routing being implemented only then. To this end, the internal and external interfaces must also be switched and the standby circuit assembly must correspondingly activated.
This the higher-ranking mechanism MPSA sends a message to the standby circuit assembly, controls the switching of the external and internal interfaces to the standby circuit assembly BGE and sends information to the affected applications.
However, the higher-ranking mechanism MPSA is mainly occupied with standby circuiting measures, which results in a loss of system dynamics. Further, a number of other assemblies that actually do not participate in the switchover process itself are integrated in the switchover process losing more valuable time. Ultimately, such a configuration runs counter to the principle of decentrally arranged maintenance in which the alternate routing is a job of the peripheral devices themselves.